How to handle the reception of a data byte from an I2C slave device in Stop0 mode by an I2C master device, both using interrupt mode. The peripheral is initialized with LL unitary service functions to optimize for performance and size.
This example guides you through the different configuration steps by mean of LL API to configure GPIO and I2C peripherals using two NUCLEO-C071RB.
Boards: NUCLEO-C071RB (embeds a STM32C071RB device)
SCL Pin: PB.8 (CN5 D15, pin 10)
SDA Pin: PB.9 (CN5 D14, pin 9)
The project is split in two parts the Master Board and the Slave Board
Master Board I2C1 Peripheral is configured in Master mode with EXTI (Clock 400Khz). And GPIO associated to User push-button is linked with EXTI.
Slave Board I2C1 Peripheral is configured in Slave mode with EXTI (Clock 400Khz, Own address 7-bit enabled, WakeUpFromStop).
The user can choose between Master and Slave through “#define SLAVE_BOARD” in the “main.h” file:
The user can disable internal pull-up by opening ioc file. For that, user can follow the procedure :
The example is updated with no pull on each pin used for I2C communication
A first program launch, BOARD SLAVE is in Stop0 mode and BOARD MASTER is waiting User action on User push-button. LED1 blinks quickly on BOARD MASTER to wait for user-button press.
Example execution: Press the User push-button on BOARD MASTER to initiate a read request by Master. This action will generate an I2C start condition with the Slave address and a read bit condition. When address Slave match code is received on I2C1 of BOARD SLAVE, a wake up is initiate and an ADDR interrupt occurs. I2C1 Slave IRQ Handler routine is then checking Address Match Code and direction Read. This will allow Slave to enter in transmitter mode and then send a byte when TXIS interrupt occurs. When byte is received on I2C1 of BOARD MASTER, an RXNE interrupt occurs. When RXDR register is read, Master auto-generate a NACK and STOP condition to inform the Slave that the transfer is finished. The NACK condition generate a NACK interrupt in Slave side treated in the I2C1 Slave IRQ handler routine by a clear of NACK flag. The STOP condition generate a STOP interrupt in both side (Slave and Master). Both I2C1 IRQ handler routine are then clearing the STOP flag in both side.
In case of errors, LED1 is blinking slowly (1s).
Connectivity, I2C, Communication, Transmission, Reception, SCL, SDA, Wake up, Interrupt
- I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/Inc/stm32c0xx_it.h Interrupt handlers header file
- I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/Inc/main.h Header for main.c module
- I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/Inc/stm32_assert.h Template file to include assert_failed function
- I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/Src/stm32c0xx_it.c Interrupt handlers
- I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/Src/main.c Main program
- I2C/I2C_TwoBoards_WakeUpFromStop_IT_Init/Src/system_stm32c0xx.c STM32C0xx system source file
This example runs on STM32C071RBTx devices.
This example has been tested with STM32C071RBTx board and can be easily tailored to any other supported device and development board.
NUCLEO-C071RB Set-up
Launch the program.
Press User push-button to initiate a read request by Master then Slave after wake up from Stop0 mode send a byte.
In order to make the program work, you must do the following :