I2C_OneBoard_Communication_DMAAndIT_Init Example Description

How to transmit data bytes from an I2C master device using DMA mode to an I2C slave device using interrupt mode. The peripheral is initialized with LL unitary service functions to optimize for performance and size.

This example guides you through the different configuration steps by mean of LL API to configure GPIO, DMA and I2C peripherals using only one NUCLEO-C071RB.

The user can disable internal pull-up by opening ioc file. For that, user can follow the procedure :

  1. Double click on the I2C_OneBoard_Communication_DMAAndIT_Init.ioc file
  2. When CUBEMX tool is opened, select System Core category
  3. Then in the configuration of GPIO/I2C1, change Pull-up to No pull-up and no pull-down for the both pins
  4. Same action in the configuration of GPIO/I2C2, change Pull-up to No pull-up and no pull-down for the both pins
  5. Last step, generate new code thanks to button “GENERATE CODE”

The example is updated with no pull on each pin used for I2C communication

I2C1 Peripheral is configured in Slave mode with EXTI (Clock 400Khz, Own address 7-bit enabled). I2C2 Peripheral is configured in Master mode with DMA (Clock 400Khz). GPIO associated to User push-button is linked with EXTI.

LED1 blinks quickly to wait for user-button press.

Example execution: Press the User push-button to initiate a write request by Master through Handle_I2C_Master() routine. This action will generate an I2C start condition with the Slave address and a write bit condition. When address Slave match code is received on I2C1, an ADDR interrupt occurs. I2C1 IRQ Handler routine is then checking Address Match Code and direction Write. This will allow Slave to enter in receiver mode and then acknowledge Master to send the bytes through DMA. When acknowledge is received on I2C2, DMA transfer the data from flash memory buffer to I2C2 TXDR register. This will allow Master to transmit a byte to the Slave. Each time a byte is received on I2C1 (Slave), an RXNE interrupt occurs until a STOP condition. And so each time the Slave acknowledge the byte received, DMA transfer the next data from flash memory buffer to I2C2 TXDR register until Transfer completed. Master auto-generate a Stop condition when DMA transfer is achieved.

The STOP condition generate a STOP interrupt and initiate the end of reception on Slave side. I2C1 IRQ handler and Handle_I2C_Master() routine are then clearing the STOP flag in both side.

LED1 is On if data are well received.

In case of errors, LED1 is blinking slowly (1s).

Keywords

Connectivity, Communication, I2C, DMA, Interrupt, Master, Slave, Transmission, Reception, Fast mode

Hardware and Software environment

How to use it ?

In order to make the program work, you must do the following :